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ltc3129 1 3129f for more information www.linear.com/3129 typical a pplica t ion fea t ures descrip t ion 15v, 200ma synchronous buck-boost dc/dc converter with 1.3a quiescent current the lt c ? 3129 is a high efficiency, 200ma buck-boost dc/dc converter with a wide v in and v out range. it includes an accurate run pin threshold to allow predictable regula- tor turn-on and a maximum power point control (mppc) capability that ensures maximum power extraction from non-ideal power sources such as photovoltaic panels. the ltc3129 employs an ultralow noise, 1.2mhz pwm switching architecture that minimizes solution footprint by allowing the use of tiny, low profile inductors and ceramic capacitors. built-in loop compensation and soft-start simplify the design. for high efficiency operation at light loads, automatic burst mode operation can be selected, reducing the quiescent current to just 1.3a. additional features include a power good output, less than 10na of shutdown current and thermal shutdown. the ltc3129 is available in thermally enhanced 3mm 3mm qfn and 16-lead msop packages. for fixed output voltage options, see the functionally equivalent ltc3129-1, which eliminates the need for an external feedback divider. l , lt, ltc, ltm, linear technology, the linear logo and burst mode are registered trademarks and powerpath is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. a pplica t ions n regulates v out above, below or equal to v in n wide v in range: 2.42v to 15v, 1.92v to 15v after start-up (bootstrapped) n wide v out range: 1.4v to 15.75v n 200ma output current in buck mode n single inductor n 1.3a quiescent current n programmable maximum power point control n 1.2mhz ultralow noise pwm n current mode control n pin selectable burst mode ? operation n up to 95% efficiency n accurate run pin threshold n power good indicator n 10na shutdown current n thermally enhanced 3mm 3mm qfn and 16-lead msop packages n industrial wireless sensor nodes n post-regulator for harvested energy n solar panel post-regulator/charger n intrinsically safe power supplies n wireless microphones n avionics-grade wireless headsets bst1 v out v out sw1 sw2 ltc3129 22nf bst2 pgood gnd fb v cc v in 2.42v to 15v v in v cc run mppc pwm 22nf 10h 10f 10f 10pf 2.2f 3129 ta01a pgnd 3.32m 1.02m 5v at 200ma, v in > 5v 5v at 100ma, v in < 5v efficiency and power loss vs load 100 output current (ma) 0.01 efficiency (%) power loss (mw) 70 80 90 50 30 20 60 40 10 0 1000 100 0.1 10 1 0.01 3129 ta01b 0.1 100 1000 101 v in = 2.5v v in = 3.6v v in = 5v v in = 15v efficiency power loss v out = 5v
ltc3129 2 3129f for more information www.linear.com/3129 a bsolu t e maxi m u m r a t ings v in , v out voltages .................................... C0 .3v to 18v sw1 dc voltage ............................ C 0.3v to (v in + 0.3v) sw2 dc voltage.......................... C0.3v to (v out + 0.3v) sw1, sw2 pulsed (<100ns) voltage .............. C 1v to 19v bst1 voltage .................... ( sw1 C 0.3v) to (sw1 + 6v) bst2 voltage .................... ( sw2 C 0.3v) to (sw2 + 6v) run, pgood voltages ............................... C 0.3v to 18v v cc , fb, pwm, mppc voltages .................... C0 .3v to 6v pgood sink current ............................................. 15 ma operating junction temperature range (notes 2, 5) ............................................ C 40c to 125c storage temperature range .................. C 65c to 150c mse lead temperature (soldering, 10 sec) .......... 3 00c (notes 1, 8) 16 15 14 13 5 6 7 8 top view ud package 16-lead (3mm 3mm) plastic qfn 9 10 11 12 4 3 2 1bst1 v in v cc run v out pgood pwm nc sw1 pgnd sw2 bst2 mppc gnd fb nc 17 pgnd t jmax = 125c, jc = 7.5c/w, ja = 68c/w (note 6) exposed pad (pin 17) is pgnd, must be soldered to pcb 1 2 3 4 5 6 7 8 v cc run mppc gnd fb nc nc pwm 16 15 14 13 12 11 10 9 v in bst1 sw1 pgnd sw2 bst2 v out pgood top view mse package 16-lead plastic msop 17 pgnd t jmax = 125c, jc = 10c/w, ja = 40c/w (note 6) exposed pad (pin 17) is pgnd, must be soldered to pcb p in c on f igura t ion o r d er i n f or m a t ion lead free finish tape and reel part marking* package description temperature range ltc3129eud#pbf ltc3129eud#trpbf lgdr 16-lead (3mm 3mm) plastic qfn C40c to 125c ltc3129iud#pbf ltc3129iud#trpbf lgdr 16-lead (3mm 3mm) plastic qfn C40c to 125c ltc3129emse#pbf ltc3129emse#trpbf 3129 16-lead plastic msop C40c to 125c ltc3129imse#pbf ltc3129imse#trpbf 3129 16-lead plastic msop C40c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ltc3129 3 3129f for more information www.linear.com/3129 e lec t rical c harac t eris t ics the l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at t a = 25c (note 2). unless otherwise noted, v in = 12v, v out = 5v. parameter conditions min typ max units v in start-up voltage l 2.25 2.42 v input voltage range v cc > 2.42v (back-driven) l 1.92 15 v v in uvlo threshold (rising) v cc > 2.42v (back-driven) l 1.8 1.9 2.0 v v in uvlo hysteresis l 80 100 130 mv output voltage adjust range l 1.4 15.75 v feedback voltage l 1.151 1.175 1.199 v feedback input current fb = 1.25v 0.1 10 na quiescent current (v in ) C shutdown run = 0v, including switch leakage 10 100 na quiescent current (v in ) uvlo either v in or v cc below their uvlo threshold, or run below the threshold to enable switching 1.9 3 a quiescent current C burst mode operation measured on v in , fb > 1.25v pwm = 0v, run = v in 1.3 2.0 a n-channel switch leakage on v in and v out sw1 = 0v, v in = 15v sw2 = 0v, v out = 15v run = 0v 10 50 na n-channel switch on-resistance v cc = 4v 0.75 inductor average current limit v out > uv threshold (note 4) v out < uv threshold (note 4) l l 220 80 275 130 350 200 ma ma inductor peak current limit (note 4) l 400 500 680 ma maximum boost duty cycle fb = 1.10v. percentage of period sw2 is low in boost mode (note 7) l 85 89 95 % minimum duty cycle fb = 1.25v. percentage of period sw1 is high in buck mode (note 7) l 0 % switching frequency pwm = v cc l 1.0 1.2 1.4 mhz sw1 and sw2 minimum low time (note 3) 90 ns mppc voltage l 1.12 1.175 1.22 v mppc input current mppc = 5v 1 10 na run threshold to enable v cc l 0.5 0.9 1.15 v run threshold to enable switching (rising) v cc > 2.4v l 1.16 1.22 1.28 v run (switching) threshold hysteresis 50 80 120 mv run input current run = 15v 1 10 na pwm input high l 1.6 v pwm input low l 0.5 v pwm input current pwm = 5v 0.1 1 a soft-start time 3 ms v cc voltage v in > 4.85v l 3.4 4.1 4.7 v v cc dropout voltage (v in C v cc ) v in = 3.0v, switching v in = 2.0v (v cc in uvlo) 35 0 60 2 mv mv v cc uvlo threshold (rising) l 2.1 2.25 2.42 v v cc uvlo hysteresis 60 mv v cc current limit v cc = 0v l 4 20 40 ma v cc back-drive voltage (maximum) l 5.5 v v cc input current (back-driven) v cc = 5.5v (switching) 2 4 ma v cc leakage to v in if v cc > v in v cc = 5.5v, v in = 1.8v, measured on v in C7 a v out uv threshold (rising) l 0.95 1.15 1.35 v
ltc3129 4 3129f for more information www.linear.com/3129 e lec t rical c harac t eris t ics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc3129 is tested under pulsed load conditions such that t j t a . the ltc3129e is guaranteed to meet specifications from 0c to 85c junction temperature. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the ltc3129i is guaranteed over the full C40c to 125c operating junction temperature range. the junction temperature (t j ) is calculated from the ambient temperature (t a ) and power dissipation (p d ) according to the formula: t j = t a + (p d ? ja c/w), where ja is the package thermal impedance. note that the maximum ambient temperature consistent with these specifications, is determined by specific operating conditions in conjunction with board layout, the rated thermal package thermal resistance and other environmental factors. note 3: specification is guaranteed by design and not 100% tested in production. parameter conditions min typ max units v out uv hysteresis 150 mv v out current C shutdown run = 0v, v out = 15v including switch leakage 10 100 na v out current C sleep pwm = 0v, fb = 1.25v v out /27 a v out current C active pwm = v cc , v out = 15v (note 4), fb = 1.25v 5 9 a pgood threshold, falling referenced to programmed v out voltage C5.5 C7.5 C10 % pgood hysteresis referenced to programmed v out voltage 2.5 % pgood voltage low i sink = 1ma 250 300 mv pgood leakage pgood = 15v 1 50 na the l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at t a = 25c (note 2). unless otherwise noted, v in = 12v, v out = 5v. note 4: current measurements are made when the output is not switching. note 5: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature may result in device degradation or failure. note 6: failure to solder the exposed backside of the package to the pc board ground plane will result in a much higher thermal resistance. note 7: switch timing measurements are made in an open-loop test configuration. timing in the application may vary somewhat from these values due to differences in the switch pin voltage during non-overlap durations when switch pin voltage is influenced by the magnitude and duration of the inductor current. note 8: voltage transients on the switch pin(s) beyond the dc limits specified in the absolute maximum ratings are non-disruptive to normal operation when using good layout practices as described elsewhere in the data sheet and application notes and as seen on the product demo board. efficiency, v out = 2.5v efficiency, v out = 3.3v typical p er f or m ance c harac t eris t ics t a = 25c, unless otherwise noted. power loss, v out = 2.5v output current (ma) 0.01 efficiency (%) 100 90 70 50 40 80 60 30 20 10 0 10 0.1 3129 g01 1000 1 100 v in = 2.5v v in = 3.6v v in = 5v v in = 10v v in = 15v burst pwm output current (ma) 0.01 efficiency (%) 100 90 70 50 40 80 60 30 20 10 0 10 0.1 3129 g03 1000 1 100 v in = 2.5v v in = 3.6v v in = 5v v in = 10v v in = 15v pwm burst output current (ma) 0.01 power loss (mw) 1000 100 10 1 0.1 0.01 10 0.1 3129 g02 1000 1 100 v in = 2.5v v in = 3.6v v in = 5v v in = 10v v in = 15v burst pwm
ltc3129 5 3129f for more information www.linear.com/3129 typical p er f or m ance c harac t eris t ics efficiency, v out = 12v maximum output current vs v in and v out efficiency, v out = 5v t a = 25c, unless otherwise noted. power loss, v out = 3.3v power loss, v out = 5v power loss, v out = 12v efficiency, v out = 15v power loss, v out = 15v v in (v) 2 i out (ma) 250 200 150 100 50 0 13 3 4 3129 g11 15 10 14 11 12 85 96 7 v out = 2.5v v out = 3.3v v out = 4.1v v out = 5v v out = 6.9v v out = 8.2v v out = 12v v out = 15v no load input current vs v in and v out (pwm = 0v) output current (ma) 0.01 efficiency (%) 100 90 70 50 40 80 60 30 20 10 0 10 0.1 3129 g05 1000 1 100 burst pwm v in = 2.5v v in = 3.6v v in = 5v v in = 10v v in = 15v output current (ma) 0.01 efficiency (%) 100 90 70 50 40 80 60 30 20 10 0 10 0.1 3129 g09 1000 1 100 pwm burst v in = 2.5v v in = 3.6v v in = 5v v in = 10v v in = 15v output current (ma) 0.01 power loss (mw) 1000 100 10 1 0.1 0.01 10 0.1 3129 g04 1000 1 100 burst pwm v in = 2.5v v in = 3.6v v in = 5v v in = 10v v in = 15v output current (ma) 0.01 power loss (mw) 1000 100 10 1 0.1 0.01 10 0.1 3129 g06 1000 1 100 pwm burst v in = 2.5v v in = 3.6v v in = 5v v in = 10v v in = 15v output current (ma) 0.01 efficiency (%) 100 90 70 50 40 40 80 60 30 20 10 0 10 0.1 3129 g07 1000 1 100 burst pwm v in = 2.5v v in = 3.6v v in = 5v v in = 10v v in = 15v output current (ma) 0.01 power loss (mw) 1000 100 10 1 0.1 0.01 10 0.1 3129 g08 1000 1 100 pwm burst v in = 2.5v v in = 3.6v v in = 5v v in = 10v v in = 15v output current (ma) 0.01 power loss (mw) 1000 100 10 1 0.1 0.01 10 0.1 3129 g10 1000 1 100 burst v in = 2.5v v in = 3.6v v in = 5v v in = 10v v in = 15v pwm v in (v) 2.5 i in (a) 30 25 20 15 10 5 0 12.5 3129 g12 14.5 10.5 4.5 8.56.5 v out = 2.5v v out = 5v v out = 10v v out = 15v fb divider current = 2a
ltc3129 6 3129f for more information www.linear.com/3129 typical p er f or m ance c harac t eris t ics accurate run threshold vs temperature (normalized to 25c) maximum output current vs temperature (normalized to 25c) v cc dropout voltage vs temperature (pwm mode, switching) v cc dropout voltage vs v in (pwm mode, switching) fixed frequency pwm waveforms t a = 25c, unless otherwise noted. average input current limit vs mppc voltage burst mode threshold vs v in and v out switch r ds(on) vs temperature temperature (c) ?45 r ds(on) () 1.3 1.2 1.1 1.0 0.8 0.7 0.6 0.5 0.9 0.4 ?20 3129 g14 130 55 10580 305 v cc = 2.5v v cc = 3v v cc = 4v v cc = 5v fb voltage vs temperature (normalized to 25c) v in (v) 2 load (ma) 80 70 60 40 30 20 10 50 0 4 3129 g13 16 10 1412 86 v out = 2.5v v out = 3.3v v out = 4.1v v out = 5v v out = 6.9v v out = 8.2v v out = 12v v out = 15v temperature (c) ?45 change in fb voltage (%) 1.00 0.50 0.75 0 ?0.50 ?0.75 ?0.25 0.25 ?1.00 ?20 3129 g15 130 55 10580 305 temperature (c) ?45 change in run threshold (%) 2 0 ?1 1 ?2 ?20 3129 g16 130 55 10580 305 mppc pin voltage (v) 1.13 percentage of full input current (%) 100 90 70 60 50 40 30 20 10 80 0 1.135 3129 g17 1.171.1651.161.155 1.145 1.15 1.14 temperature (c) ?45 change in maximum output current (%) 15 10 0 ?5 5 ?15 ?10 ?20 3129 g18 130 55 10580 305 temperature (c) ?45 dropout (mv) 60 50 30 20 40 0 10 ?20 3129 g19 130 55 10580 305 v in (v) 2 dropout (mv) 60 50 30 20 40 0 10 2.25 3129 g20 4 3 3.5 3.75 3.25 2.752.5 l = 10h v in = 7v v out = 5v i out = 200ma sw2 5v/div sw1 5v/div 3129 g21 500ns/div i l 200ma/div
ltc3129 7 3129f for more information www.linear.com/3129 fixed frequency ripple on v out typical p er f or m ance c harac t eris t ics step load transient response in fixed frequency step load transient response in burst mode operation pgood response to a drop on v out burst mode waveforms burst mode ripple on v out start-up waveforms t a = 25c, unless otherwise noted. mppc response to a step load l = 10h v in = 7v v out = 5v i out = 200ma c out = 10f 3129 g22 200ns/div i l 200ma/div v out 20mv/div l = 10h v in = 7v v out = 5v i out = 5ma c out = 22f (with the recommended feedforward capacitor) 3129 g24 100s/div i l 100ma/div v out 100mv/div v in = 7v v out = 5v i out = 50ma c out = 22f 3129 g25 1ms/div i vin 200ma/div v out 5v/div v cc 5v/div run 5v/div l = 10h v in = 7v v out = 5v c out = 10f i out = 50ma to 150ma step 3129 g26 500s/div i vout 100ma/div v out 100mv/div l = 10h v in = 7v v out = 5v c out = 22f (with the recommended feedforward capacitor) i out = 5ma to 125ma step 3129 g27 500s/div i vout 100ma/div v out 100mv/div v out = 5v 3129 g28 1ms/div pgood 2v/div v out 2v/div v in = 5v oc v mppc set to 3.5v c in = 22f, r in = 10, v out = 5v, c out = 22f i out = 25ma to 125ma step 3129 g29 2ms/div i vout 100ma/div v out 2v/div v in 2v/div l = 10h v in = 7v v out = 5v i out = 5ma c out = 22f 3129 g23 50s/div i l 200ma/div sw2 5v/div sw1 5v/div
ltc3129 8 3129f for more information www.linear.com/3129 p in func t ions bst1 (pin 1/pin 15): bootstrapped floating supply for high side nmos gate drive. connect to sw1 through a 22nf capacitor, as close to the part as possible. the value is not critical. any value from 4.7nf to 47nf may be used. v in (pin 2/pin 16): input voltage for the converter. connect a minimum of 4.7f ceramic decoupling capacitor from this pin to the ground plane, as close to the pin as possible. v cc (pin 3/pin 1): output voltage of the internal voltage regulator. this is the supply pin for the internal circuitry. bypass this output with a minimum of 2.2f ceramic capacitor close to the pin. this pin may be back-driven by an external supply, up to a maximum of 5.5v. run (pin 4/pin 2): input to the run comparator. pull this pin above 1.1v to enable the v cc regulator and above 1.28v to enable the converter. connecting this pin to a resistor divider from v in to ground allows programming a v in start threshold higher than the 1.8v (typical) v in uvlo threshold. in this case, the typical v in turn-on threshold is determined by v in = 1.22v ? [1+(r3/r4)] (see figure 2). mppc (pin 5/pin 3): maximum power point control pro- gramming pin. connect this pin to a resistor divider from v in to ground to enable the mppc functionality. if the v out load is greater than what the power source can provide, the mppc will reduce the inductor current to regulate v in to a voltage determined by: v in = 1.175v ? [1+(r5/r6)] (see figure 3). by setting the v in regulation voltage appro- priately, maximum power transfer from the limited source is assured. note this pin is very noise sensitive, therefore minimize trace length and stray capacitance. please refer to the applications information section for more detail on programming the mppc for different sources. if this function is not needed, tie the pin to v cc . gnd (pin 6/pin 4): signal ground. provide a short direct pcb path between gnd and the ground plane where the exposed pad is soldered. fb (pin 7/pin 5): feedback input to the error amplifier. connect to a resistor divider from v out to ground. the output voltage can be adjusted from 1.4v to 15.75v by: v out = 1.175v ? [1+(r1/r2)]. note this pin is very noise sensitive, therefore minimize trace length and stray ca- pacitance. nc (pins 8, 9/pins 6, 7): unused. these pins should be grounded. pwm (pin 10/pin 8): mode select pin. pwm = low (ground): enables automatic burst mode operation. pwm = high (tie to v cc ): fixed frequency pmw opera- tion. this pin should not be allowed to float. it has an internal 5m pull-down resistor. pgood (pin 11/pin 9): open drain output that pulls to ground when fb drops too far below its regulated volt- age. connect a pull-up resistor from this pin to a positive supply. this pin can sink up to the absolute maximum rating of 15ma when low. note that this pin is forced low in shutdown or v cc uvlo. v out (pin 12/pin 10): output voltage of the converter. connect a minimum value of 4.7f ceramic capacitor from this pin to the ground plane, as close to the pin as possible. bst2 (pin 13/pin 11): bootstrapped floating supply for high side nmos gate drive. connect to sw2 through a 22nf capacitor, as close to the part as possible. the value is not critical. any value from 4.7nf to 47nf may be used. sw2 (pin 14/pin 12): switch pin. connect to one side of the inductor. keep pcb trace lengths as short and wide as possible to reduce emi. pgnd (pin 15, exposed pad pin 17/pin 13, exposed pad pin 17): power ground. provide a short direct pcb path between pgnd and the ground plane. the exposed pad must also be soldered to the pcb ground plane. it serves as a power ground connection, and as a means of conducting heat away from the die. sw1 (pin 16/pin 14): switch pin. connect to one side of the inductor. keep pcb trace lengths as short and wide as possible to reduce emi. (qfn/msop)
ltc3129 9 3129f for more information www.linear.com/3129 b lock diagra m 3129 bd ldo v ref start v ref v cc v cc v cc_gd start start 4.1v 1.175v v ref + ? sd uvlo + ? ? + + ? ? + thermal shutdown + ? ? + pwm 600mv ?7.5% osc gnd sleep 100mv reset enable i lim i zero i sense 20ma i sense v ref_gd 500ma pgnd clamp + ? 1.175v ? + ? + ? + ? + driver driver driver driver i sense i sense drv_c 1.1v uv nc v out v cc v out nc fb drv_d drv_b drv_a i sense logic pgood soft-start + ? mppc run v cc v in v in bst1 sw1 sw2 d c a b bst2 pwm sleep v in 0.9v 1.22v 1.175v 1.175v v c 5m
ltc3129 10 3129f for more information www.linear.com/3129 o pera t ion i ntroduction the ltc3129 is a 1.3a quiescent current, monolithic, cur - rent mode, buck-boost dc/dc converter that can operate over a wide input voltage range of 1.92v to 15v and provide up to 200ma to the load. internal, low r ds(on) n-channel power switches reduce solution complexity and maximize efficiency. a proprietary switch control algorithm allows the buck-boost converter to maintain output voltage regulation with input voltages that are above, below or equal to the output voltage. transitions between the step-up or step- down operating modes are seamless and free of transients and sub-harmonic switching, making this product ideal for noise sensitive applications. the ltc3129 operates at a fixed nominal switching frequency of 1.2mhz, which provides an ideal trade-off between small solution size and high efficiency. current mode control provides inherent input line voltage rejection, simplified compensation and rapid response to load transients. burst mode capability is also included in the ltc3129 and is user-selected via the pwm input pin. in burst mode operation, the ltc3129 provides exceptional efficiency at light output loading conditions by operating the converter only when necessary to maintain voltage regulation. the burst mode quiescent current is a miserly 1.3a. at higher loads, the ltc3129 automatically switches to fixed fre - quency pwm mode when burst mode operation is selected. (please refer to the typical performance characteristics curves for the mode transition point at different input and output voltages.) if the application requires extremely low noise, continuous pwm operation can also be selected via the pwm pin. a mppc (maximum power point control) function is also provided that allows the input voltage to the converter to be servo'd to a programmable point for maximum power when operating from various non-ideal power sources such as photovoltaic cells. the ltc3129 also features an accurate run comparator threshold with hysteresis, allowing the buck-boost dc/dc converter to turn on and off at user-selected v in voltage thresholds. with a wide voltage range, 1.3a burst mode current and program - mable run and mppc pins, the ltc3129 is well suited for many diverse applications. p wm m ode o pera tion if the pwm pin is high or if the load current on the converter is high enough to command pwm mode operation with pwm low, the ltc3129 operates in a fixed 1.2mhz pwm mode using an internally compensated average current mode control loop. pwm mode minimizes output voltage ripple and yields a low noise switching frequency spec- trum. a proprietary switching algorithm provides seam - less transitions between operating modes and eliminates discontinuities in the average inductor current, inductor ripple current and loop transfer function throughout all modes of operation. these advantages result in increased efficiency, improved loop stability and lower output voltage ripple in comparison to the traditional buck-boost converter. figure 1 shows the topology of the ltc3129 power stage which is comprised of four n-channel dmos switches and their associated gate drivers. in pwm mode operation both switch pins transition on every cycle independent of the input and output voltages. in response to the internal control loop command, an internal pulse width modulator generates the appropriate switch duty cycle to maintain regulation of the output voltage. figure 1. power stage schematic a v cc bst1 c bst1 c bst2 l bst2 v in v out sw1 sw2 v cc v cc v cc ltc3129 pgnd pgnd 3129 f01 b d c
ltc3129 11 3129f for more information www.linear.com/3129 o pera t ion when stepping down from a high input voltage to a lower output voltage, the converter operates in buck mode and switch d remains on for the entire switching cycle except for the minimum switch low duration (typically 90ns). dur - ing the switch low duration, switch c is turned on which forces sw2 low and charges the flying capacitor, c bst2 . this ensures that the switch d gate driver power supply rail on bst2 is maintained. the duty cycle of switches a and b are adjusted to maintain output voltage regulation in buck mode. if the input voltage is lower than the output voltage, the converter operates in boost mode. switch a remains on for the entire switching cycle except for the minimum switch low duration (typically 90ns). during the switch low duration, switch b is turned on which forces sw1 low and charges the flying capacitor, c bst1 . this ensures that the switch a gate driver power supply rail on bst1 is maintained. the duty cycle of switches c and d are adjusted to maintain output voltage regulation in boost mode. oscillator the ltc3129 operates from an internal oscillator with a nominal fixed frequency of 1.2mhz. this allows the dc/dc converter efficiency to be maximized while still using small external components. current mode control the ltc3129 utilizes average current mode control for the pulse width modulator. current mode control, both average and the better known peak method, enjoy some benefits compared to other control methods including: simplified loop compensation, rapid response to load transients and inherent line voltage rejection. referring to the block diagram, a high gain, internally compensated transconductance amplifier monitors vout through a voltage divider connected to the fb pin. the error amplifier output is used by the current mode control loop to command the appropriate inductor current level. the inverting input of the internally compensated average current amplifier is connected to the inductor current sense circuit. the average current amplifier's output is compared to the oscillator ramps, and the comparator outputs are used to control the duty cycle of the switch pins on a cycle-by-cycle basis. the voltage error amplifier monitors the output voltage, v out through a voltage divider and makes adjustments to the current command as necessary to maintain regulation. the voltage error amplifier therefore controls the outer voltage regulation loop. the average current amplifier makes adjustments to the inductor current as directed by the voltage error amplifier output via v c and is commonly referred to as the inner current loop amplifier. the average current mode control technique is similar to peak current mode control except that the average current amplifier, by virtue of its configuration as an integrator, controls average current instead of the peak current. this difference eliminates the peak to average current error inherent to peak current mode control, while maintaining most of the advantages inherent to peak current mode control. average current mode control requires appropriate com- pensation for the inner current loop, unlike peak current mode control. the compensation network must have high dc gain to minimize errors between the actual and com- manded average current level, high bandwidth to quickly change the commanded current level following transient load steps and a controlled mid-band gain to provide a form of slope compensation unique to average current mode control. the compensation components required to ensure proper operation have been carefully selected and are integrated within the ltc3129. inductor current sense and maximum output current as part of the current control loop required for current mode control, the ltc3129 includes a pair of current sensing circuits that measure the buck-boost converter inductor current. the voltage error amplifier output, v c , is internally clamped to a nominal level of 0.6v. since the average inductor current is proportional to v c , the 0.6v clamp level sets the maximum average inductor current that can be pro- grammed by the inner current loop. taking into account the current sense amplifier's gain, the maximum average
ltc3129 12 3129f for more information www.linear.com/3129 inductor current is approximately 275ma (typical). in buck mode, the output current is approximately equal to the inductor current i l . i out(buck) i l ? 0.89 the 90ns sw1/sw2 forced low time on each switching cycle briefly disconnects the inductor from v out and v in resulting in about 11% less output current in either buck or boost mode for a given inductor current. in boost mode, the output current is related to average inductor current and duty cycle by: i out(boost) i l ? (1 C d) ? efficiency, where d is the converter duty cycle. since the output current in boost mode is reduced by the duty cycle (d), the output current rating in buck mode is always greater than in boost mode. also, because boost mode operation requires a higher inductor current for a given output current compared to buck mode, the efficiency in boost mode will be lower due to higher i l 2 ? r ds(on) losses in the power switches. this will further reduce the output current capability in boost mode. in either operating mode, however, the inductor peak-to-peak ripple current does not play a major role in determining the output cur - rent capability, unlike peak current mode control. with peak current mode control, the maximum output current capability is reduced by the magnitude of inductor ripple current because the peak inductor current level is the control variable, but the average inductor current is what determines the output current. the ltc3129 measures and controls average inductor current, and therefore, the inductor ripple current magnitude has little effect on the maximum current capability in contrast to an equivalent peak current mode converter. under most conditions in buck mode, the ltc3129 is capable of providing a mini - mum of 200ma to the load. in boost mode, as described previously, the output current capability is related to the boost ratio or duty cycle (d). for example, for a 3.6v v in to 5v output application, the ltc3129 can provide up to 150ma to the load. refer to the typical performance characteristics section for more detail on output current capability. o pera t ion overload current limit and i zero comparator the internal current sense waveform is also used by the peak overload current (i peak ) and zero current (i zero ) com- parators. the i peak current comparator monitors isense and turns off switch a if the inductor current level exceeds its maximum internal threshold, which is approximately 500ma. an inductor current level of this magnitude will occur during a fault, such as an output short-circuit, or during large load or input voltage transients. the ltc3129 features near discontinuous inductor current operation at light output loads by virtue of the i zero com- parator circuit. by limiting the reverse current magnitude in pwm mode, a balance between low noise operation and improved efficiency at light loads is achieved. the i zero comparator threshold is set near the zero current level in pwm mode, and as a result, the reverse current magnitude will be a function of inductance value and output voltage due to the comparator's propagation delay. in general, higher output voltages and lower inductor values will result in increased reverse current magnitude. in automatic burst mode operation (pwm pin low), the i zero comparator threshold is increased so that reverse inductor current does not normally occur. this maximizes efficiency at very light loads. burst mode o pera tion when the pwm pin is held low , the ltc3129 is configured for automatic burst mode operation. as a result, the buck- boost dc/dc converter will operate with normal continu- ous pwm switching above a predetermined minimum output load and will automatically transition to power saving burst mode operation below this output load level. note that if the pwm pin is low, reverse inductor current is not allowed at any load. refer to the typical performance characteristics section to determine the burst mode transition threshold for various combinations of v in and v out . if pwm is low, at light output loads, the ltc3129 will go into a standby or sleep state when the output volt- age achieves its nominal regulation level. the sleep state halts pwm switching and powers down all non-essential
ltc3129 13 3129f for more information www.linear.com/3129 o pera t ion functions of the ic, significantly reducing the quiescent current of the ltc3129 to just 1.3a typical. this greatly improves overall power conversion efficiency when the output load is light. since the converter is not operating in sleep, the output voltage will slowly decay at a rate determined by the output load resistance and the output capacitor value. when the output voltage has decayed by a small amount, typically 1%, the ltc3129 will wake and resume normal pwm switching operation until the volt - age on v out is restored to the previous level. if the load is very light, the ltc3129 may only need to switch for a few cycles to restore v out and may sleep for extended periods of time, significantly improving efficiency. if the load is suddenly increased above the burst transition threshold, the part will automatically resume continuous pwm operation until the load is once again reduced. a feedforward capacitor on the feedback divider can be used to reduce burst mode v out ripple. this is discussed in more detail in the applications information section of this data sheet. note that burst mode operation is inhibited until soft-start is done, the mppc pin is greater than 1.175v and v out has reached regulation. soft-start the ltc3129 soft-start circuit minimizes input current transients and output voltage overshoot on initial power up. the required timing components for soft-start are internal to the ltc3129 and produce a nominal soft-start dura - tion of approximately 3ms. the internal soft-start circuit slowly ramps the error amplifier output, v c . in doing so, the current command of the ic is also slowly increased, starting from zero. it is unaffected by output loading or output capacitor value. soft-start is reset by the uvlo on both v in and v cc , the run pin and thermal shutdown. v cc regulator an internal low dropout regulator (ldo) generates a nomi- nal 4.1v v cc rail from v in . the v cc rail powers the internal control circuitry and the gate drivers of the ltc3129. the v cc regulator is disabled in shutdown to reduce quiescent current and is enabled by raising the run pin above its logic threshold. the v cc regulator includes current-limit protection to safeguard against accidental short-circuiting of the v cc rail. undervoltage lockout (uvlo) there are two undervoltage lockout (uvlo) circuits within the ltc3129 that inhibit switching; one that monitors v in and another that monitors v cc . either uvlo will disable operation of the internal power switches and keep other ic functions in a reset state if either v in or v cc are below their respective uvlo thresholds. the v in uvlo comparator has a falling voltage threshold of 1.8v (typical). if v in falls below this level, ic operation is disabled until v in rises above 1.9v (typical), as long as the v cc voltage is above its uvlo threshold. the v cc uvlo has a falling voltage threshold of 2.19v (typical). if the v cc voltage falls below this threshold, ic operation is disabled until v cc rises above 2.25v (typical) as long as v in is above its nominal uvlo threshold level. depending on the particular application, either of these uvlo thresholds could be the limiting factor affecting the minimum input voltage required for operation. because the v cc regulator uses v in for its power input, the minimum input voltage required for operation is determined by the v cc minimum voltage, as input voltage (v in ) will always be higher than v cc in the normal (non-bootstrapped) configuration. therefore, the minimum v in for the part to startup is 2.25v (typical). in applications where v cc is bootstrapped (powered through a schottky diode by either v out or an auxiliary power rail), the minimum input voltage for operation will be limited only by the v in uvlo threshold (1.8v typical). please note that if the bootstrap voltage is derived from the ltc3129 v out and not an independent power rail, then the minimum input voltage required for initial startup is still 2.25v (typical). note that if either v in or v cc are below their uvlo thresh- olds, or if run is below its accurate threshold of 1.22v (typical), then the ltc3129 will remain in a soft shutdown state, where the v in quiescent current will be only 1.9a typical.
ltc3129 14 3129f for more information www.linear.com/3129 o pera t ion v out undervoltage there is also an undervoltage comparator that monitors the output voltage. until v out reaches 1.15v (typical), the average current limit is reduced by a factor of two. this reduces power dissipation in the device in the event of a shorted output. in addition, n-channel switch d, which feeds v out , will be disabled until v out exceeds 1.15v. run pin comparator in addition to serving as a logic level input to enable cer - tain functions of the ic, the run pin includes an accurate internal comparator that allows it to be used to set custom rising and falling on/off thresholds with the addition of an optional external resistor divider. when run is driven above its logic threshold (0.9v typical), the v cc regulator is enabled, which provides power to the internal control circuitry of the ic. if the voltage on run is increased further so that it exceeds the run comparator's accurate analog threshold (1.22v typical), all functions of the buck-boost converter will be enabled and a start-up sequence will ensue, assuming the v in and v cc uvlo thresholds are satisfied. if run is brought below the accurate comparator threshold, the buck-boost converter will inhibit switching, but the v cc regulator and control circuitry will remain powered unless run is brought below its logic threshold. therefore, in order to completely shut down the ic and reduce the vin current to 10na (typical), it is necessary to ensure that run is brought below its worst case low logic threshold of 0.5v. run is a high voltage input and can be tied directly to v in to continuously enable the ic when the input supply is present. also note that run can be driven above v in or v out as long as it stays within the operating range of the ic (up to 15v). with the addition of an optional resistor divider as shown in figure 2, the run pin can be used to establish a user- programmable turn-on and turn-off threshold. this feature can be utilized to minimize battery drain below a certain input voltage, or to operate the converter in a hiccup mode from very low current sources. figure 2. accurate run pin comparator ltc3129 enable switching enable ldo and control circuits logic threshold accurate threshold 3129 f02 + ? ? + 0.9v run 1.22v v in r3 r4 note that once run is above 0.9v typical, the quiescent input current on v in (or v cc if back-driven) will increase to about 1.9a typical until the v in and v cc uvlo thresholds are satisfied. the converter is enabled when the voltage on run exceeds 1.22v (nominal). therefore, the turn-on voltage threshold on v in is given by: v in(turn-on) = 1.22v ? (1 + r3/r4) the run comparator includes a built-in hysteresis of approximately 80mv, so that the turn off threshold will be 1.14v. there may be cases due to pcb layout, very large value resistors for r3 and r4, or proximity to noisy components where noise pickup may cause the turn-on or turn-off of the ic to be intermittent. in these cases, a small filter capaci - tor can be added across r4 to ensure proper operation.
ltc3129 15 3129f for more information www.linear.com/3129 o pera t ion pgood comparator the ltc3129 provides an open-drain pgood output that pulls low if v out falls more than 7.5% (typical) below its programmed value. when v out rises to within 5% (typical) of its programmed value, the internal pgood pull-down will turn off and pgood will go high if an external pull- up resistor has been provided. an internal filter prevents nuisance trips of pgood due to short transients on v out . note that pgood can be pulled up to any voltage, as long as the absolute maximum rating of 18v is not exceeded, and as long as the maximum sink current rating is not exceeded when pgood is low. note that pgood will also be driven low if v cc is below its uvlo threshold or if the part is in shutdown (run below its logic threshold) while v cc is being held up (or back-driven). pgood is not affected by v in uvlo or the accurate run threshold. maximum power-point control (mppc) the mppc input of the ltc3129 can be used with an optional external voltage divider to dynamically adjust the commanded inductor current in order to maintain a minimum input voltage when using high resistance sources, such as photovoltaic panels, so as to maximize input power transfer and prevent v in from dropping too low under load. referring to figure 3, the mppc pin is internally connected to the non-inverting input of a g m amplifier, whose inverting input is connected to the 1.175v reference. if the voltage at mppc, using the external volt- age divider, falls below the reference voltage, the output of the amplifier pulls the internal v c node low. this reduces the commanded average inductor current so as to reduce the input current and regulate v in to the programmed minimum voltage, as given by: v in(mppc) = 1.175v ? (1 + r5/r6) note that external compensation should not be required for mppc loop stability if input filter capacitor, c in , is at least 22f. the divider resistor values can be in the m range to minimize the input current in very low power applications. however, stray capacitance and noise pickup on the mppc pin must also be minimized. figure 3. mppc amplifier with external resistor divider ltc3129 1.175v v c current command voltage error amp 3129 f03 mppc fb r5 r6 r s v source *c in * c in should be at least 22f for mppc applications v in + ? + ? + ?
ltc3129 16 3129f for more information www.linear.com/3129 o pera t ion figure 4. typical 2-layer pc board layout (mse package) the mppc pin controls the converter in a linear fashion when using sources that can provide a minimum of 5ma to 10ma of continuous input current. for operation from weaker input sources, refer to the applications informa - tion section to see how the programmable run pin can be used to control the converter in a hysteretic manner to provide an effective mppc function for sources that can provide as little as 5a or less. if the mppc function is not required, the mppc pin should be tied to v cc . thermal considerations the power switches of the ltc3129 are designed to oper - ate continuously with currents up to the internal current limit thresholds. however, when operating at high current levels, there may be significant heat generated within the ic. in addition, the v cc regulator can also generate wasted heat when v in is very high, adding to the total power dissipation of the ic. as described elsewhere in this data sheet, bootstrapping of the v cc for 5v output applications can essentially eliminate the v cc power dissipation term and significantly improve efficiency. as a result, careful consideration must be given to the thermal environment of the ic in order to provide a means to remove heat from the ic and ensure that the ltc3129 is able to provide its full rated output current. specifically, the exposed die attach pad of both the qfn and mse packages must be soldered to a copper layer on the pcb to maximize the conduction of heat out of the ic package. this can be ac- complished by utilizing multiple vias from the die attach pad connection underneath the ic package to other pcb layer(s) containing a large copper plane. a typical board layout incorporating these concepts is shown in figure 4. if the ic die temperature exceeds approximately 180c, over temperature shutdown will be invoked and all switching will be inhibited. the part will remain disabled until the die temperature cools by approximately 10c. the soft-start circuit is re-initialized in overtemperature shutdown to provide a smooth recovery when the ic die temperature cools enough to resume operation. gnd v in v cc gnd v out c out c in l 3129 f04
ltc3129 17 3129f for more information www.linear.com/3129 a pplica t ions i n f or m a t ion a standard application circuit for the ltc3129 is shown on the front page of this data sheet. the appropriate selection of external components is dependent upon the required performance of the ic in each particular application given considerations and trade-offs such as pcb area, input and output voltage range, output voltage ripple, transient response, required efficiency, thermal considerations and cost. this section of the data sheet provides some basic guidelines and considerations to aid in the selection of external components and the design of the applications circuit, as well as more application circuit examples. programming v out the output voltage of the ltc3129 is set by connecting the fb pin to an external resistor divider from v out to ground, as shown in figure 5, according to the equation: v out = 1.175v ? (1+ r1/r2) sible. v cc is the regulator output and is also the internal supply pin for the ltc3129 control circuitry as well as the gate drivers and boost rail charging diodes. the v cc pin is not intended to supply current to other external circuitry. inductor selection the choice of inductor used in ltc3129 application circuits influences the maximum deliverable output current, the converter bandwidth, the magnitude of the inductor current ripple and the overall converter efficiency. the inductor must have a low dc series resistance, when compared to the internal switch resistance, or output current capabil- ity and efficiency will be compromised. larger inductor values reduce inductor current ripple but may not increase output current capability as is the case with peak current mode control as described in the maximum output cur - rent section. larger value inductors also tend to have a higher dc series resistance for a given case size, which will have a negative impact on efficiency. larger values of inductance will also lower the right half plane (rhp) zero frequency when operating in boost mode, which can compromise loop stability. nearly all ltc3129 application circuits deliver the best performance with an inductor value between 3.3h and 10h. buck mode-only applications can use the larger inductor values as they are unaffected by the rhp zero, while mostly boost applications generally require inductance on the low end of this range depending on how large the step-up ratio is. regardless of inductor value, the saturation current rating should be selected such that it is greater than the worst-case average inductor current plus half of the ripple current. the peak-to-peak inductor current ripple for each operational mode can be calculated from the following formula, where f is the switching frequency (1.2mhz), l is the inductance in h and t low is the switch pin minimum low time in s. the switch pin minimum low time is typically 0.09s. ? i l(p ? p)(buck) = v out l v in C v out v in ? ? ? ? ? ? 1 f C t low ? ? ? ? ? ? a ? i l(p ? p)(boost) = v in l v out C v in v out ? ? ? ? ? ? 1 f C t low ? ? ? ? ? ? a figure 5. v out feedback divider a small feedforward capacitor can be added in parallel with r1 (in figure 5) to reduce burst mode ripple and improve transient response. details on selecting a feedforward capacitor are provided later in this data sheet. v cc capacitor selection the v cc output of the ltc3129 is generated from v in by a low dropout linear regulator. the v cc regulator has been designed for stable operation with a wide range of output capacitors. for most applications, a low esr capacitor of at least 2.2f should be used. the capacitor should be located as close to the v cc pin as possible and connected to the v cc pin and ground through the shortest traces pos- 3129 f05 ltc3129 v out v out r1 c out fb c ff r2
ltc3129 18 3129f for more information www.linear.com/3129 it should be noted that the worst-case peak-to-peak in- ductor ripple current occurs when the duty cycle in buck mode is minimum (highest v in ) and in boost mode when the duty cycle is 50% (v out = 2 ? v in ). as an example, if v in (minimum) = 2.5v and v in (maximum) = 15v, v out = 5v and l = 10h, the peak-to-peak inductor ripples at the voltage extremes (15v v in for buck and 2.5v v in for boost) are: buck = 248ma peak-to-peak boost = 93ma peak-to-peak one half of this inductor ripple current must be added to the highest expected average inductor current in order to select the proper saturation current rating for the inductor. to avoid the possibility of inductor saturation during load transients, an inductor with a saturation current rating of at least 600ma is recommended for all applications. in addition to its influence on power conversion efficiency, the inductor dc resistance can also impact the maximum output current capability of the buck-boost converter particularly at low input voltages. in buck mode, the output current of the buck-boost converter is primarily limited by the inductor current reaching the average cur - rent limit threshold. however, in boost mode, especially at large step-up ratios, the output current capability can also be limited by the total resistive losses in the power stage. these losses include, switch resistances, inductor dc resistance and pcb trace resistance. avoid inductors with a high dc resistance (dcr) as they can degrade the maximum output current capability from what is shown in the typical performance characteristics section and from the typical application circuits. as a guideline, the inductor dcr should be significantly less than the typical power switch resistance of 750m? each. the only exceptions are applications that have a maximum output current requirement much less than what the ltc3129 is capable of delivering. generally speaking, inductors with a dcr in the range of 0.15 to 0.3 are recommended. lower values of dcr will improve the ef- ficiency at the expense of size, while higher dcr values will reduce efficiency (typically by a few percent) while allowing the use of a physically smaller inductor. a pplica t ions i n f or m a t ion different inductor core materials and styles have an impact on the size and price of an inductor at any given current rating. shielded construction is generally preferred as it minimizes the chances of interference with other circuitry. the choice of inductor style depends upon the price, sizing, and emi requirements of a particular application. table 1 provides a wide sampling of inductors that are well suited to many ltc3129 applications. table 1. recommended inductors vendor part coilcraft www.coilcraft.com epl2014, epl3012, epl3015, lps3015, lps3314, xfl3012 coiltronics www.cooperindustries.com sdh3812, sd3814, sd3114, sd3118 murata www.murata.com lqh3np, lqh32p, lqh44p sumida www.sumida.com cdrh2d16, cdrh2d18, cdrh3d14, cdrh3d16 taiyo-yuden www.t-yuden.com nr3012t, nr3015t, nrs4012t, brc2518 tdk www.tdk.com vls3012, vls3015, vlf302510mt, vlf302512mt toko www.tokoam.com db3015c, db3018c, db3020c, dp418c, dp420c, dem2815c, dfe322512c, dfe252012c wrth www.we-online.com we-tpc 2813, we-tpc 3816, we-tpc 2828 recommended inductor values for different operating voltage ranges are given in table 2. these values were chosen to minimize inductor size while maintaining an acceptable amount of inductor ripple current for a given v in and v out range. table 2. recommended inductor values v in and v out range recommended inductor values v in and v out both < 4.5v 3.3h to 4.7h v in and v out both < 8v 4.7h to 6.8h v in and v out both < 11v 6.8h to 8.2h v in and v out up to 15.75v 8.2h to 10h feedforward capacitor the use of a voltage feedforward capacitor, as shown in figure 5, offers a number of performance advantages. a feedforward capacitor will reduce output voltage ripple in
ltc3129 19 3129f for more information www.linear.com/3129 a pplica t ions i n f or m a t ion examining the previous equations reveals that the output voltage ripple increases with load current and is gener - ally higher in boost mode than in buck mode. note that these equations only take into account the voltage ripple that occurs from the inductor current to the output being discontinuous. they provide a good approximation to the ripple at any significant load current but underestimate the output voltage ripple at very light loads where the output voltage ripple is dominated by the inductor current ripple. in addition to the output voltage ripple generated across the output capacitance, there is also output voltage ripple produced across the internal resistance of the output capacitor. the esr-generated output voltage ripple is proportional to the series resistance of the output capacitor and is given by the following expressions where r esr is the series resistance of the output capacitor and all other terms as previously defined. ? v p ? p(buck) = i load r esr 1C t low f ? i load r esr v ? v p ? p(boost) = i load r esr v out v in 1C t low f ( ) ? i load r esr v out v in ? ? ? ? ? ? v in most ltc3129 applications, an output capacitor between 10f and 22f will work well. to minimize output ripple in burst mode operation, or transients incurred by large step loads, values of 22f or larger are recommended. input capacitor selection the v in pin carries the full inductor current and provides power to internal control circuits in the ic. to minimize input voltage ripple and ensure proper operation of the ic, a low esr bypass capacitor with a value of at least 4.7f should be located as close to the v in pin as possible. the traces connecting this capacitor to v in and the ground plane should be made as short as possible. burst mode operation and improve transient response. in addition, due to the wide v in and v out operating range of the ltc3129 and its fixed internal loop compensation, some applications may require the use of a feedforward capacitor to assure light-load stability (less than ~15ma) when operating in pwm mode (pwm pin pulled high). therefore, to reduce burst mode ripple and improve phase margin at light load when pwm mode operation is selected, a feedforward capacitor is recommended for all applications. the recommended feedforward capacitor value can be calculated by: c ff = 66/r1 where r1 is the top feedback divider resistor value in m and c ff is the recommended feedforward capacitor value in picofarads (use the nearest standard value). refer to the application circuits for examples. output capacitor selection a low effective series resistance (esr) output capacitor of 4.7f minimum should be connected at the output of the buck-boost converter in order to minimize output volt- age ripple. multilayer ceramic capacitors are an excellent option as they have low esr and are available in small footprints. the capacitor value should be chosen large enough to reduce the output voltage ripple to acceptable levels. neglecting the capacitor's esr and esl (effec- tive series inductance), the peak-to-peak output voltage ripple in pwm mode can be calculated by the following formula, where f is the frequency in mhz (1.2mhz), c out is the capacitance in f, t low is the switch pin minimum low time in s (0.09s typical) and i load is the output current in amperes. ? v p ? p(buck) = i load t low c out v ? v p ? p(boost) = i load fc out v out C v in + t low fv in v out ? ? ? ? ? ? v
ltc3129 20 3129f for more information www.linear.com/3129 when powered through long leads or from a power source with significant resistance, a larger value bulk input ca - pacitor may be required and is generally recommended. in such applications, a 47f to 100f low-esr electrolytic capacitor in parallel with a 1f ceramic capacitor generally yields a high performance, low cost solution. note that applications using the mppc feature should use a minimum c in of 22f. larger values can be used without limitation. recommended input and output capacitor types the capacitors used to filter the input and output of the ltc3129 must have low esr and must be rated to handle the ac currents generated by the switching converter. this is important to maintain proper functioning of the ic and to reduce output voltage ripple. there are many capacitor types that are well suited to these applications including multilayer ceramic, low esr tantalum, os-con and poscap technologies. in addition, there are certain types of electrolytic capacitors such as solid aluminum organic polymer capacitors that are designed for low esr and high ac currents and these are also well suited to some ltc3129 applications. the choice of capacitor technology is primarily dictated by a trade-off between size, leakage current and cost. in backup power applica - tions, the input or output capacitor might be a super or ultra capacitor with a capacitance value measuring in the farad range. the selection criteria in these applications are generally similar except that voltage ripple is generally not a concern. some capacitors exhibit a high dc leak- age current which may preclude their consideration for applications that require a very low quiescent current in burst mode operation. note that ultra capacitors may have a rather high esr, therefore a 4.7f (minimum) ceramic capacitor is recommended in parallel, close to the ic pins. ceramic capacitors are often utilized in switching con- verter applications due to their small size, low esr and low leakage currents. however, many ceramic capacitors intended for power applications experience a significant loss in capacitance from their rated value as the dc bias voltage on the capacitor increases. it is not uncommon for a small surface mount capacitor to lose more than 50% of its rated capacitance when operated at even half of its maximum rated voltage. this effect is generally reduced as the case size is increased for the same nominal value capacitor. as a result, it is often necessary to use a larger value capacitance or a higher voltage rated capacitor than would ordinarily be required to actually realize the intended capacitance at the operating voltage of the application. x5r and x7r dielectric types are recommended as they exhibit the best performance over the wide operating range and temperature of the ltc3129. to verify that the intended capacitance is achieved in the application circuit, be sure to consult the capacitor vendor's curve of capacitance versus dc bias voltage. using the programmable run function to operate from extremely weak input sources another application of the programmable run pin is that it can be used to operate the converter in a hiccup mode from extremely low current sources. this allows operation from sources that can only generate microamps of output current, and would be far too weak to sustain normal steady- state operation, even with the use of the mppc pin. because the ltc3129 draws only 1.9a typical from v in until it is enabled, the run pin can be programmed to keep the ic disabled until v in reaches the programmed voltage level. in this manner, the input source can trickle-charge an input storage capacitor, even if it can only supply microamps of current, until v in reaches the turn-on threshold set by the run pin divider. the converter will then be enabled using the stored charge in the input capacitor, until vin drops below the turn-off threshold, at which point the converter will turn off and the process will repeat. this approach allows the converter to run from weak sources such as thin-film solar cells using indoor light - ing. although the converter will be operating in bursts, it is enough to charge an output capacitor to power low duty cycle loads, such as wireless sensor applications, or to trickle charge a battery. in addition, note that the input voltage will be cycling (with a small ripple as set by the run hysteresis) about a fixed voltage, as determined by the divider. this allows the high impedance source to operate at the programmed optimal voltage for maximum power transfer. a pplica t ions i n f or m a t ion
ltc3129 21 3129f for more information www.linear.com/3129 a pplica t ions i n f or m a t ion when using high value divider resistors (in the m range) to minimize current draw on v in , a small noise filter capacitor may be necessary across the lower divider resistor to prevent noise from erroneously tripping the run comparator. the capacitor value should be minimized so as not to introduce a time delay long enough for the input voltage to drop significantly below the desired v in threshold before the converter is turned off. note that larger v in decoupling capacitor values will minimize this effect by providing more holdup time on v in . programming the mppc voltage as discussed in the previous section, the ltc3129 in - cludes an mppc function to optimize performance when operating from voltage sources with relatively high source resistance. using an external voltage divider from v in , the mppc function takes control of the average inductor current when necessary to maintain a minimum input voltage, as programmed by the user. referring to figure 3: v in(mppc) = 1.175v ? (1 + r5/r6) this is useful for such applications as photovoltaic powered converters, since the maximum power transfer point occurs when the photovoltaic panel is operated at about 75% of its open-circuit voltage. for example, when operating from a photovoltaic panel with an open-circuit voltage of 5v, the maximum power transfer point will be when the panel is loaded such that its output voltage is about 3.75v. choosing values of 2m for r5 and 909k for r6 will program the mppc function to regulate the maximum input current so as to maintain v in at a minimum of 3.74v (typical). note that if the panel can provide more power than the ltc3129 can draw, the input voltage will rise above the programmed mppc point. this is fine as long as the input voltage doesn't exceed 15v. for weak input sources with very high resistance (hun - dreds of ohms or more), the ltc3129 may still draw more current than the source can provide, causing v in to drop below the uvlo threshold. for these applications, it is recommended that the programmable run feature be used, as described in the previous section. mppc compensation and gain when using mppc, there are a number of variables that affect the gain and phase of the input voltage control loop. primarily these are the input capacitance, the mppc divider ratio and the v in source resistance (or current). to simplify the design of the application circuit, the mppc control loop in the ltc3129 is designed with a relatively low gain, such that external mppc loop compensation is generally not required when using a v in capacitor value of at least 22f. the gain from the mppc pin to the in - ternal vc control voltage is about 12, so a drop of 50mv on the mppc pin (below the 1.175v mppc threshold), corresponds to a 600mv drop on the internal vc voltage, which reduces the average inductor current all the way to zero. therefore, the programmed input mppc voltage will be maintained within about 4% over the load range. note that if large value v in capacitors are used (which may have a relatively high esr) a small ceramic capacitor of at least 4.7f should be placed in parallel across the v in input, near the v in pin of the ic. bootstrapping the v cc regulator the high and low side gate drivers are powered through the v cc rail, which is generated from the input voltage, v in , through an internal linear regulator. in some applications, especially at high input voltages, the power dissipation in the linear regulator can become a major contributor to thermal heating of the ic and overall efficiency. the typical performance characteristics section provides data on the v cc current and resulting power loss versus v in and v out . a significant performance advantage can be attained in high v in applications where converter output voltage (v out ) is programmed to 5v, if v out is used to power the v cc rail. powering v cc in this manner is referred to as bootstrap- ping. this can be done by connecting a schottky diode (such as a bat54) from v out to v cc as shown in figure 6. with the bootstrap diode installed, the gate driver currents are supplied by the buck-boost converter at high efficiency rather than through the internal linear regulator. the in - ternal linear regulator contains reverse blocking circuitry
ltc3129 22 3129f for more information www.linear.com/3129 that allows v cc to be driven above its nominal regulation level with only a very slight amount of reverse current. please note that the bootstrapping supply (either v out or a separate regulator) must be limited to less than 5.7v so as not to exceed the maximum v cc voltage of 5.5v after the diode drop. by maintaining v cc above its uvlo threshold, bootstrap- ping, even to a 3.3v output, also allows operation down to the v in uvlo threshold of 1.8v (typical). sources of small photovoltaic panels a list of companies that manufacture small solar panels (sometimes referred to as modules or solar cell arrays) suitable for use with the ltc3129 is provided in table 3. table 3. small photovoltaic panel manufacturers sanyo http://panasonic.net/energy/amorton/en/ powerfilm http://www.powerfilmsolar.com/ ixys corporation http://www.ixys.com/productportfolio/greenenergy.aspx g24 innovations http://www.g24i.com/ solarprint http://www.solarprint.ie/ a pplica t ions i n f or m a t ion figure 6. example of v cc bootstrap 3129 f06 ltc3129 v out v out bat54 c out v cc 2.2f
ltc3129 23 3129f for more information www.linear.com/3129 typical a pplica t ions low noise 3.6v converter using bootstrap diode to extend lower v in range hiccup converter powers wireless sensor from indoor lighting transmit rate vs light level (fluorescent) light level (lx) 0 transmit rate (hz) 4.5 4.0 2.0 3.5 3.0 2.5 1.5 1.0 0.5 0 3129 ta02b 2000 800 1200 1600 400 bst1 v out v out 3.6v sw1 sw2 ltc3129 22nf bst2 pgood fb gnd v cc v in v in 1.8v to 15v run mppc pwm v cc nc nc 22nf 6.8h 2m bat54 976k 10f 10f 33pf 2.2f 3129 ta03 pgnd v in < 3.6v, i out = 100ma v in > 3.6v, i out = 200ma bst1 v out v out 3.6v sw1 sw2 ltc3129 22nf bst2 pgood fb pgood gnd v cc v in v in uvlo = 3.5v run mppc pwm v cc nc nc 22nf 4.7h 1m 2m 976k 2.37m 4.42m 470f 6.3v + 10pf 22f 4.7f 2.2f 3129 ta02a pgnd pv panel sanyo am-1815 4.9cm 5.8cm pulsed i out 25ma for 5ms
ltc3129 24 3129f for more information www.linear.com/3129 light level (lx) 1000 output current (ma) 100.0 10.0 1.0 0.1 3129 ta04b 1000000 100000 10000 typical a pplica t ions solar powered converter with mppc charges storage capacitor li-ion powered 3v converter with 3.1v input uvlo reduces low battery i q to 3a 15v converter operates from three to eight aa or aaa cells average output current vs light level (daylight) bst1 v out v out 4.8v pgood sw1 sw2 ltc3129 22nf bst2 pgood fb gnd v cc v in v in uvlo = 4.3v run mppc pwm nc nc 22nf 4.7h 1m v cc 392k 8.4cm 3.7cm 47f ceramic 4.7f 1f 3.09m 2.2f 3129 ta04a pgnd powerfilm sp4.2-37 solar module 1m + cooper bussmann pb-5r0v105-r bst1 v out v out 3v 200ma sw1 sw2 ltc3129 22nf bst2 pgood fb gnd v cc v cc v in li-ion + run mppc pwm nc nc 22nf 4.7h 2m uvlo = 3.1v 1.27m 4.7f 10pf 10f 33pf 1.58m 2.2f 3129 ta05 pgnd 1.02m v cc bst1 v out v out 15v 25ma minimum sw1 sw2 ltc3129 22nf bst2 pgood fb gnd v cc v in v in 2.42v to 15v run 22nf 10h 10f 25v 3.01m 2.2f 3129 ta06 pgnd three to eight aa or aaa batteries mppc pwm nc nc 10f 255k 22pf
ltc3129 25 3129f for more information www.linear.com/3129 typical a pplica t ions energy harvesting converter operates from a variety of weak sources solar powered converter extends battery life in low power 3v primary battery applications percentage of added battery life vs light level and load (powerfilm sp4.2-37, 30sq cm panel) light level (lx) 100 added battery life (%) 1000 100 10 1 3129 ta09b 10,000 1,000 average load = 165w average load = 330w average load = 660w average load = 1650w average load = 3300w v cc bst1 v out v out 5v sw1 sw2 ltc3129 22nf bst2 pgood fb gnd v cc v in bas 70-05 uvlo = 3.3v run 22nf 4.7h 10f 3.32m 2.2f 3129 ta07 pgnd mppc pwm nc nc 100f ceramic 1.02m 4.99m 3.01m bas 70-06 input sources: ? rf ? ac ? piezo ? coil-magnet 10pf 22pf bst1 v out sw1 sw2 ltc3129 22nf 3.20v bst2 pgood fb gnd v cc v cc v in run mppc pwm nc nc 22nf 3.3h toko dem2812c 10pf 2.2f v out bat54 470f 6.3v 74lvc2g04 3129 ta09 pgnd fdc6312p dual pmos pv panel sanyo am-1815 or powerfilm sp4.2-37 4.7f v in uvlo = 3.7v 4.99m 4.22m 2.43m d1 d2 s2s1 g2 cr2032 3v coin cell v out 3v to 3.2v g1 2.43m 22f r4 2.43m 15pf 2.2f +
ltc3129 26 3129f for more information www.linear.com/3129 p ackage descrip t ion please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 3.00 0.10 (4 sides) recommended solder pad pitch and dimensions 1.65 0.05 (4 sides) note: 1. drawing conforms to jedec package outline mo-220 variation (weed-4) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 bottom view?exposed pad 1.65 0.10 (4-sides) 0.75 0.05 r = 0.115 typ 0.25 0.05 1 pin 1 notch r = 0.20 typ or 0.25 45 chamfer 15 16 2 0.50 bsc 0.200 ref 2.10 0.05 3.50 0.05 0.70 0.05 0.00 ? 0.05 (ud16 var a) qfn 1207 rev a 0.25 0.05 0.50 bsc package outline ud package 16-lead plastic qfn (3mm 3mm) (reference ltc dwg # 05-08-1700 rev a) exposed pad variation aa
ltc3129 27 3129f for more information www.linear.com/3129 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. p ackage descrip t ion please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. msop (mse16) 0911 rev e 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 ?0.27 (.007 ? .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 16 16151413121110 1 2 3 4 5 6 7 8 9 9 1 8 note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 6. exposed pad dimension does include mold flash. mold flash on e-pad shall not exceed 0.254mm (.010") per side. 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc bottom view of exposed pad option 2.845 0.102 (.112 .004) 2.845 0.102 (.112 .004) 4.039 0.102 (.159 .004) (note 3) 1.651 0.102 (.065 .004) 1.651 0.102 (.065 .004) 0.1016 0.0508 (.004 .002) 3.00 0.102 (.118 .004) (note 4) 0.280 0.076 (.011 .003) ref 4.90 0.152 (.193 .006) detail ?b? detail ?b? corner tail is part of the leadframe feature. for reference only no measurement purpose 0.12 ref 0.35 ref mse package 16-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1667 rev e)
ltc3129 28 3129f for more information www.linear.com/3129 ? linear technology corporation 2013 lt 0213 ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/3129 r ela t e d p ar t s typical a pplica t ion dual v in application, using the ltc4412 powerpath? controller part number description comments LTC3103 15v, 300ma synchronous step-down dc/dc converter with ultralow quiescent current v in(min) = 2.2v, v in(max) = 15v, v out(min) = 0.8v, i q = 1.8a, i sd <1a, 3mm 3mm dfn-10, msop-10 packages ltc3104 15v, 300ma synchronous step-down dc/dc converter with ultralow quiescent current and 10ma ldo v in(min) = 2.2v, v in(max) = 15v, v out(min) = 0.8v, i q = 2.8a, i sd <1a, 4mm 3mm dfn-14, msop-16 packages ltc3105 400ma step-up converter with mppc and 250mv start-up v in(min) = 0.2v, v in(max) = 5v, v out(min) = 0 5.25v max , i q = 22a, i sd <1a, 3mm 3mm dfn-10/msop-12 packages ltc3112 15v, 2.5a, 750khz monolithic synch buck/boost v in(min) = 2.7v, v in(max) = 15v, v out(min) = 2.7v to 14v, i q = 50a, i sd <1a, 4mm 5mm dfn-16 tssop-20e packages ltc3115-1 40v, 2a, 2mhz monolithic synch buck/boost v in(min) = 2.7v, v in(max) = 40v, v out(min) = 2.7v to 40v, i q = 50a, i sd <1a, 4mm 5mm dfn-16 and tssop-20e packages ltc3531 5.5v, 200ma, 600khz monolithic synch buck/boost v in(min) = 1.8v, v in(max) = 5.5v, v out(min) = 2v to 5v, i q = 16a, i sd <1a, 3mm 3mm dfn-8 and thinsot packages ltc3388-1/ ltc3388-3 20v, 50ma high efficiency nano power step-down regulator v in(min) = 2.7v, v in(max) =20v, v out(min) = fixed 1.1v to 5.5v, i q = 720na, i sd = 400na, 3mm 3mm dfn-10, msop-10 packages ltc3108/ ltc3108-1 ultralow voltage step-up converter and power manager v in(min) = 0.02v, v in(max) = 1v, v out(min) = fixed 2.35v to 5v, i q = 6a, i sd <1a, 3mm 4mm dfn-12, ssop-16 packages ltc3109 auto-polarity, ultralow voltage step-up converter and power manager v in(min) = 0.03v, v in(max) = 1v, v out(min) = fixed 2.35v to 5v, i q = 7a, i sd <1a, 4mm 4mm qfn-20, ssop-20 packages ltc3588-1 piezo electric energy harvesting power supply v in(min) = 2.7v, v in(max) = 20v, v out(min) = fixed 1.8v to 3.6v, i q = 950na, i sd 450na, 3mm 3mm dfn-10, msop-10e packages ltc4070 li-ion/polymer low current shunt battery charger system v in(min) = 450na to 50ma, v float + 4.0v, 4.1v, 4.2v, i q = 300na, 2mm 3mm dfn-8, msop-8 packages bst1 v out v out 12v sw1 sw2 ltc3129 22nf bst2 pgood fb gnd v cc v cc v in run mppc pwm nc nc 22nf mbr0520 fdn338 bss314 10h 10f 12v wall adapter input 10f 25v 3.01m 2.2f 3129 ta08 pgnd v in = 12v, i out = 200ma v in = 3.6v, i out = 50ma 324k ltc4412 gnd v in ctl li-ion + gate stat sense 10pf

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